MS8416T/ ΔMS8416N
MAIN FEATURES
Features
Complete EIAJ CP1201, IEC-60958, AES3,S/PDIF-Compatible Receiver
+3.3 V Analog Supply (VA)
+3.3 V Digital Supply (VD)
+3.3 V or +5.0 V Digital Interface Supply (VL)
8:2 S/PDIF Input MUX
AES/SPDIF Input Pins Selectable in Hardware Mode
Three General Purpose Outputs (GPO) Allow Signal Routing
S/PDIF-to-TX Inputs Selectable in Hardware Mode
SPI or I²C Control Port Software Mode and StandAlone Hardware Mode
32 kHz to 192 kHz Sample Frequency Range
Low-Jitter Clock Recovery
Pin and Microcontroller Read Access to Channel Status and User Data
Differential Cable Receive
On-Chip Channel Status Data Buffer Memories
Auto-Detection of Compressed Audio Input Streams
Decodes CD Q Sub-Code
OMCK System Clock Mode